Routing Congestion in VLSI Circuits: Estimation and Optimization

MLA

Saxena, Prashant, et al. Routing Congestion In Vlsi Circuits: Estimation and Optimization. Springer US, 2007.

APA

Saxena, P., Sapatnekar, S. S, Shelar, R. S, & Sapatnekar, S. (2007). Routing Congestion in VLSI Circuits: Estimation and Optimization. Springer US.

Chicago

Saxena, Prashant, Sachin S Sapatnekar, Rupesh S Shelar, and Sachin Sapatnekar. Routing Congestion In VLSI Circuits: Estimation and Optimization. : Springer US, 2007.