Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

MLA

Sachdev, Manoj, and José Pineda de Gyvez. Defect-oriented Testing for Nano-metric Cmos Vlsi Circuits. Springer US, 2007.

APA

Sachdev, M., & Pineda de Gyvez, J. (2007). Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits. Springer US.

Chicago

Sachdev, Manoj, and José Pineda de Gyvez. Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits. : Springer US, 2007.