Design, Analysis and Test of Logic Circuits Under Uncertainty

MLA

Krishnaswamy, Smita, Igor L Markov, and John P Hayes. Design, Analysis and Test of Logic Circuits Under Uncertainty. Springer Netherlands, 2013.

APA

Krishnaswamy, S., Markov, I. L, & Hayes, J. P. (2013). Design, Analysis and Test of Logic Circuits Under Uncertainty. Springer Netherlands.

Chicago

Krishnaswamy, Smita, Igor L Markov, and John P Hayes. Design, Analysis and Test of Logic Circuits Under Uncertainty. : Springer Netherlands, 2013.