Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

MLA

Lourenço, Nuno; Martins, Ricardo; Horta, Nuno, Nuno Horta, and Ricardo Martins. Automatic Analog Ic Sizing and Optimization Constrained with Pvt Corners and Layout Effects. Springer International Publishing, 2017.

APA

Lourenço, N., Horta, N., & Martins, R. (2017). Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects. Springer International Publishing.

Chicago

Lourenço, Nuno; Martins, Ricardo; Horta, Nuno, Nuno Horta, and Ricardo Martins. Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects. : Springer International Publishing, 2017.