MARC Record

Leader
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a| ebook
008 250703s----------------------000---eng-d
001 2550000000000752
009 ebk03
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a| 2550000000000752
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a| G M /I D METHODOLOGY, A SIZING TOOL FOR LOW-VOLTAGE ANALOG CMOS CIRCUITS
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a| gm
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a| GM/ID DESIGN METHODOLOGY FOR CMOS ANALOG LOW POWER INTEGRATED CIRCUITS : KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE
210
  
  
a| GM/ID DESIGN METHODOLOGY, A SIZING TOOL FOR LOW-VOLTAGE ANALOG CMOS CIRCUITS
210
  
  
a| gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches : Analog circuits and signal processing series
210
  
  
a| gm/ID Methodology, a Sizing Tool for Low-Voltage Analog Cmos Circuits
210
  
  
a| GM/ID METHODOLOGY, A SIZING TOOL FOR LOW-VOLTAGE ANALOG CMOS CIRCUITS : THE SEMI-EMPIRICAL AND COMPACT MODEL APPROACHES
210
  
  
a| GM/ID METHODOLOGY, A SIZING TOOL FOR LOW-VOLTAGE ANALOG CMOS CIRCUITS: THE SEMI-EMPIRICAL AND COMPACT MODEL APPROACHES
210
  
  
a| THE GM/ID DESIGN METHODOLOGY FOR CMOS ANALOG LOW POWER INTEGRATED CIRCUITS
210
  
  
a| The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits
210
  
  
a| THE GM/ID METHODOLOGY, A SIZING TOOL FOR LOW-VOLTAGE ANALOG CMOS CIRCUITS
245
  
  
a| The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits
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b| Springer US c| 2010
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a| 0-387-47100-6
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a| 1-4614-2505-0
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a| 9786612838095
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a| 1-282-83809-1
020
  
  
a| 0-387-47101-4
100
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a| Jespers, Paul G.
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u| http://sfxit.ugent.be/sfx_howest?url_ver=Z39.88-2004&ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&rfr_id=info:sid/sfxit.com:opac_856&url_ctx_fmt=info:ofi/fmt:kev:mtx:ctx&sfx.ignore_date_threshold=1&rft.object_id=2550000000000752&svc_val_fmt=info:ofi/fmt:kev:mtx:sch_svc&svc.fulltext=yes&
866
  
  
s| 3860000000000675 t| 3860000000000883 x| SpringerLink Books - AutoHoldings:Full Text z| 3850000001499540