VHDL for designers. - Sjoholm, Stefan, ....-; Lindh, Lennart, ....- (Harlow : Pearson, 1997)
The specific goal of this work is not only to teach VHDL but also to describe how to use VHDL when designing an electronic system with modern design tools. The synthesis tools Synopsys, Mentor Graphics and ViewLogic are used. It describes both an academic approach to VHDL and how VHDL is used in real industrial projects, showing the difference between VHDL-87 and VHDL-93. The different types of test benches, and how they are built up and realized in VHDL are examined and the book also covers state machines, synthesis, design and test methodologies and laboratories.
Keywords: VHDL (vhsic hardware description language).