a| 0131415565

a| Howest

a| eng

a| 621.39

a| 681.32.062

a| 663.43 2| vsiso

a| Starter's guide to Verilog 2001.

a| Upper Saddle River : b| Pearson, c| 2004.

a| XIV, 234 p. : b| ill.

a| For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science. Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revisionemerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.

a| Logische schakelingen.

a| Ciletti, Michael D., d| ....- 0| (viaf)

b| HWPNT c| PENTA j| PENTA.663.43 CILE 04 p| 3009830

a| book