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MARC Record

Leader
001 001932865
003 BE-GnUNI
005 20230809091650.0
008 120111s2009 ||||||||||||||||| ||eng||
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a| 9783639147261
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a| Howest
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0
  
a| eng
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a| 525.1 2| vsiso
245
0
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a| Embedded system design : b| algorithms acceleration by a reconfigurable computing platform of FPGA's / c| Radha Guha.
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a| Saarbrücken : b| VDM, c| 2009.
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a| 155 p. : b| ill.
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a| This book offers an efficient embedded system architecture design in the study of algorithm acceleration by the reconfigurable computing platform of FPGAs. Embedded system design has become very complex recently. The large computational need of multiple applications on the same chip and the tremendous parallel processing capability of the reconfigurable FPGA platform have motivated our research work to find the best application configuration architecture suitable for the data intensive streaming applications for performance gain. The essence of parallelism is striking a balance between resource usage and performance improvement. Under resource constraint situation, essence of parallelism is utilizing the resources more efficiently. The small or medium sized processors in the same chip can operate as a single instruction multiple data (SIMD) and/or multiple instructions and multiple data (MIMD) execution mode. We have found that a modular flexible application configuration architecture having better resource utilization is the key to power savings and overall performance improvement for the applications.
700
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a| Guha, Radha, d| ....- 0| (viaf)
852
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b| HWPNT c| PENTA j| PENTA.525.1 GUHA 09 p| 3012873
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a| book
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