MARC Record

Leader
001 003533873
003 BE-GnUNI
005 20250201132119.0
008 020617s2003 cau |r |000 ||eng|d
020
  
  
a| 1558607242
020
  
  
a| 1558605967
040
  
  
a| Howest
050
0
0
a| QA76.9.A73 b| P377 2003
080
  
  
a| 681.32
082
0
  
a| 004.22
100
1
  
a| Hennessy, John L., d| 1952- 0| (viaf)4986532
245
1
0
a| Computer architecture : b| a quantitative approach / c| John L. Hennessy, David A. Patterson; with contributions by David Goldberg.
250
  
  
a| 3rd ed.
260
  
  
a| San Francisco (Calif.) : b| Morgan Kaufmann, c| 2003.
300
  
  
a| Var. pag.: ill.
520
  
  
a| Chapter 1 - Fundamentals of Computer Design Chapter 2 - Instruction Set Principles and Examples Chapter 3 - Instruction-Level Parallelism and Its Dynamic Exploitation Chapter 4 - Exploiting Instruction-Level Parallelism with Software Approaches Chapter 5 - Memory Hierarchy Design Chapter 6 - Multiprocessors and Thread-Level Parallelism Chapter 7 - Storage Systems Chapter 8 - Interconnection Networks and Clusters Appendix A - Pipelining: Basic and Intermediate Concepts Appendix B - Solutions to Selected Exercises Online Appendices Appendix C - A Survey of RISC Architectures for Desktop, Server, and Embedded Computers Appendix D - An Alternative to RISC: The Intel 80x86 Appendix E - Another Alternative to RISC: The VAX Architecture Appendix F - The IBM 360/370 Architecture for Mainframe Computers Appendix G - Vector Processors Revised by Krste Asanovic Appendix H - Computer Arithmetic by David Goldberg Appendix I - Implementing Coherence Protocols
650
  
7
a| Computer architecture. 2| lcsh
650
  
7
a| Computerarchitectuur. 2| z
700
1
  
a| Patterson, David A., d| 1947- 0| (viaf)2527326
852
4
  
b| HWPNT c| PENTA j| PENTA.ELA.681.32 p| 3009613
920
  
  
a| book