Verilog quickstart : a practical guide to simulation and synthesis in Verilog.

Format:
book
Title:
Verilog quickstart : a practical guide to simulation and synthesis in Verilog.
Author:
Lee, James M.
Year:
2002
Language:
English
Publisher:
New York : Springer, 2002
Description:
XXII, 355 p. cd-rom.
Call number:
PENTA.663.43 LEE 02 (PENTA)
ISBN:
0792376722
Subject:
Logische schakelingen
Summary:
List of Figures. List of Examples. List of Tables. 1. Introduction. 2. Introduction to the Verilog Language. 3. Structural Modeling. 4. Behavioral Modeling. 5. Operators. 6. Working with Behavioral Modeling. 7. User-Defined Primitives. 8. Parameterized Modules. 9. State Machines. 10. Modeling Tips. 11. Modeling Style Trade-Offs. 12. Test Benches and Test Management. 13. Common Errors. 14. Debugging a Design. Appendix A: Gate Level Details. Appendix B: Example Summary. Index.
Permalink:
http://bibtest.howest.be/catalog/hws01:001927168?locale=en